/*-------------------------------- Arctic Core ------------------------------
 * Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
 * Contact: <contact@arccore.com>
 *
 * You may ONLY use this file:
 * 1)if you have a valid commercial ArcCore license and then in accordance with
 * the terms contained in the written license agreement between you and ArcCore,
 * or alternatively
 * 2)if you follow the terms found in GNU General Public License version 2 as
 * published by the Free Software Foundation and appearing in the file
 * LICENSE.GPL included in the packaging of this file or here
 * <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
 *-------------------------------- Arctic Core -----------------------------*/

#ifndef _ZYNQ_H
#define _ZYNQ_H

/* DIO MUX (GPIO) */
/* MIO pins */
#define PIN_CONTROL_REG_0_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_1_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_2_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_3_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_4_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_5_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_6_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_7_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_8_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_52_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_53_PORT_PIN_MODE_DIO  L3_SEL0

/* EMIO pins */
#define PIN_CONTROL_REG_54_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_55_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_56_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_57_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_58_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_59_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_60_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_61_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_62_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_63_PORT_PIN_MODE_DIO   L3_SEL0
#define PIN_CONTROL_REG_64_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_65_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_66_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_67_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_68_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_69_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_70_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_71_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_72_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_73_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_74_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_75_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_76_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_77_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_78_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_80_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_81_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_82_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_83_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_84_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_85_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_86_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_87_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_88_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_89_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_90_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_91_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_92_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_93_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_94_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_95_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_96_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_97_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_98_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_99_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_100_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_101_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_102_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_103_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_104_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_105_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_106_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_107_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_108_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_109_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_110_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_111_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_112_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_113_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_114_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_115_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_116_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_117_PORT_PIN_MODE_DIO  L3_SEL0
#define PIN_CONTROL_REG_118_PORT_PIN_MODE_DIO  L3_SEL0

/* ICU MUX (GPIO) */
/* MIO pins */
#define PIN_CONTROL_REG_0_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_1_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_2_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_3_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_4_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_5_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_6_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_52_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_53_PORT_PIN_MODE_ICU  L3_SEL0

/* EMIO pins */
#define PIN_CONTROL_REG_54_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_55_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_56_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_57_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_58_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_59_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_60_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_61_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_62_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_63_PORT_PIN_MODE_ICU   L3_SEL0
#define PIN_CONTROL_REG_64_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_65_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_66_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_67_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_68_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_69_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_70_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_71_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_72_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_73_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_74_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_75_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_76_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_77_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_78_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_80_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_81_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_82_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_83_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_84_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_85_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_86_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_87_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_88_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_89_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_90_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_91_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_92_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_93_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_94_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_95_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_96_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_97_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_98_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_99_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_100_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_101_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_102_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_103_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_104_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_105_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_106_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_107_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_108_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_109_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_110_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_111_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_112_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_113_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_114_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_115_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_116_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_117_PORT_PIN_MODE_ICU  L3_SEL0
#define PIN_CONTROL_REG_118_PORT_PIN_MODE_ICU  L3_SEL0

/* CAN MUX */
#define PIN_CONTROL_REG_8_PORT_PIN_MODE_CAN    L3_SEL1
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_CAN    L3_SEL1
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_52_PORT_PIN_MODE_CAN   L3_SEL1
#define PIN_CONTROL_REG_53_PORT_PIN_MODE_CAN   L3_SEL1

/* UART MUX */
#define PIN_CONTROL_REG_8_PORT_PIN_MODE_UART    L3_SEL7
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_UART    L3_SEL7
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_52_PORT_PIN_MODE_UART   L3_SEL7
#define PIN_CONTROL_REG_53_PORT_PIN_MODE_UART   L3_SEL7

/* TTC MUX */
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_TTC    L3_SEL6
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_TTC    L3_SEL6

/* PWM MUX (TTC) */
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_PWM    L3_SEL6
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_PWM    L3_SEL6
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_PWM    L3_SEL6
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_PWM    L3_SEL6
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_PWM    L3_SEL6
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_PWM    L3_SEL6

/* SWDT MUX */
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_52_PORT_PIN_MODE_SWDT    L3_SEL3
#define PIN_CONTROL_REG_53_PORT_PIN_MODE_SWDT    L3_SEL3


/* SPI MUX */
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_SPI    L3_SEL5
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_SPI    L3_SEL5

/* QUAD SPI */
#define PIN_CONTROL_REG_0_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_1_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_2_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_3_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_4_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_5_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_6_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_8_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_QSPI    L0_SEL1
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_QSPI   L0_SEL1
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_QSPI   L0_SEL1
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_QSPI   L0_SEL1
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_QSPI   L0_SEL1

/* SICU POWER MUX */
#define PIN_CONTROL_REG_0_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_1_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_2_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_3_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_4_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_5_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_6_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_7_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_8_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_SDIOP     L2_SEL3
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_52_PORT_PIN_MODE_SDIOP    L2_SEL3
#define PIN_CONTROL_REG_53_PORT_PIN_MODE_SDIOP    L2_SEL3

/* SDIO MUX */
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_SDIO   L3_SEL4
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_SDIO   L3_SEL4

/* I2C MUX */
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_52_PORT_PIN_MODE_I2C    L3_SEL2
#define PIN_CONTROL_REG_53_PORT_PIN_MODE_I2C    L3_SEL2


/* SRAM/NOR FLASH MUX */
#define PIN_CONTROL_REG_0_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_3_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_4_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_5_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_6_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_7_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_8_PORT_PIN_MODE_SRAM_NOR    L3_SEL2
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_SRAM_NOR    L2_SEL1
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_SRAM_NOR    L2_SEL1

/* NAND FLASH MUX */
#define PIN_CONTROL_REG_0_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_2_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_3_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_4_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_5_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_6_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_7_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_8_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_NAND    L2_SEL2
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_NAND    L2_SEL2

/* PJTAG MUX */
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_PJTAG    L3_SEL3
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_PJTAG    L3_SEL3

/* TRACE MUX */
#define PIN_CONTROL_REG_2_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_3_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_4_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_5_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_6_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_7_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_8_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_9_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_10_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_11_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_12_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_13_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_14_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_15_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_TRACE    L1_SEL1
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_TRACE    L1_SEL1

/* USB MUX */
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_40_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_41_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_42_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_43_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_44_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_45_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_46_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_47_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_48_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_49_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_50_PORT_PIN_MODE_USB    L1_SEL1
#define PIN_CONTROL_REG_51_PORT_PIN_MODE_USB    L1_SEL1


/* ETHERNET MUX */
#define PIN_CONTROL_REG_16_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_17_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_18_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_19_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_20_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_21_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_22_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_23_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_24_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_25_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_26_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_27_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_28_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_29_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_30_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_31_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_32_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_33_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_34_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_35_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_36_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_37_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_38_PORT_PIN_MODE_ETHERNET    L0_SEL1
#define PIN_CONTROL_REG_39_PORT_PIN_MODE_ETHERNET    L0_SEL1



#endif /*PORTDEFS_H_*/
